The prominent talent training problem currently faced by computer majors in china is mainly reflected in the relatively saturated number of computer application developers, but the lack of talent in the development of underlying software and hardware, especially the lack of talent in computer processor chip design. This is certainly related to the industrial environment of China's processor chips in the past few years, but it is also closely related to the training methods of processor chip talents in domestic universities. Specifically, there is a lack of hands-on links like clinical internships in hospitals. Although students can learn a lot of knowledge from textbooks, it is difficult for them to understand the principles behind these knowledge points, and they cannot truly master the ability to design processor chips.

In response to the above situation, College of Computer Science and Technology, University of Chinese Academy of Sciences (referred to as "UCAS") based on the existing theoretical classroom and experimental teaching, combined with the scientific research engineering support team of the The Institute of Computing Technology, Chinese Academy of Sciences (referred to as "ICT"), in August 2019, the "One Student One Chip" open source processor chip teaching tape-out practice project initiative was launched, thus forming an organic connection and through-type practical training for theoretical courses, experimental seminars and practical projects in the direction of computer systems.

# Goal

The "One Student One Chip" teaching team proposed the "Computer System Capability 3.0" processor chip talent training goal. That is to say, taking open source processor chips as the entry point, using the processor chip agile development method as the experimental method, the computer science (CS) and electronic information engineering (EE) professional courses are designed through the integration, highlighting the integration of science and education and the integration of industry, academia and research. Paying equal attention to theory and practice, we implement on-silicon processor chip teaching through the teaching tape-out plan, and cultivate top-notch full-stack talents in the field of computer systems.

The core concept of "One Student One Chip" is simply "allowing a student to graduate with a processor chip designed by himself". It is hoped that the threshold of processor chip design can be lowered through a teaching mechanism that pays equal attention to theory and practice, so that more students can participate in every aspect of processor chip design throughout the process.

"Public welfare" is an important attribute of "One Student One Chip". The registration and study of "One Student One Chip" is free. Both current students and graduates can participate in the "One Student One Chip" study. However, due to limited funds, free tape-out is only for current students. As long as you have a strong interest in processor chip learning and want to develop in the direction of processor chips, students with zero foundation can join. Regardless of grade, major and school, you can sign up.

Extended materials

The concept of "Computer System Capability 3.0" processor chip talent training is to use open source technology, make open source processor chips, and cultivate processor chip talents. Specifically, in order to cultivate processor chip talents with computer system capabilities, the core courses and practical content of system orientation at the undergraduate level of computer science (CS) include software and hardware courses such as composition principles, architecture, operating systems, and compilation, and extended to the electronic information (EE) major, including courses on system-on-chip SoC and processor chip back-end design. Based on the open source software and hardware ecosystem, a processor chip talent training system is formed to explore "teaching on silicon". That is, students design the processor chip by themselves, submit the layout files to the processor chip foundry (Foundry) for tape-out, and conduct testing, debugging and running the operating system after tape-out.

# Highlights

At the strategic level, the "One Student One Chip" plan has three main goals. First, break down the barriers of imbalance in educational resources. Allowing all students who are interested in processor chip design, regardless of school, grade, major and foundation, to have the opportunity to participate in the study of processor chips. This has very important and positive significance for improving the popularization of processor chip education in colleges and universities in china. Second, break through the boundaries of traditional courses and try to build a full-stack talent training program that integrates EE and CS. The core of the "One Student One Chip" Initiative is to build a set of processor chip teaching processes that collaborate with software and hardware and open up the entire front-end and back-end chain, so that students not only know how to design processor chips with code, but also understand how the program runs on the processor chip they designed, and also understand how the code of the processor chip is converted into a tape-out layout. Third, students participating in the initiative are encouraged to enter software and hardware open source communities and enterprises, and strive to overcome various areas that currently need to be solved in china. At the same time, achievements in these fields are also incorporated into teaching plans to attract more students to participate in the "One Student One Chip" Initiative and achieve a virtuous positive cycle.

At the teaching level, the "One Student One Chip" Initiative first has a low slope. The project team divided the training process into multiple stages according to the difficulty of teaching processor chips. The introduction of the preliminary stage will increase the learning enthusiasm of zero-based students, so that they can transition to formal learning of processor chips relatively smoothly. Moreover, corresponding game operation goals are set at each stage, which not only increases the fun, but also encourages students to continuously explore the design and implementation of more powerful processor chips. Second is high standards. Not only are students required to understand how software programs run step by step on hardware circuits, but they are also required to exercise their ability to independently solve unknown problems. TAs only provide guidance on key nodes and encourage active exploration to find solutions to problems.

The sixth session of "One Student One Chip" was officially launched on July 2, 2023. There are 4 new highlights in this session (as shown in the figure below): First, the teaching team subdivided the processor tape-out standards for the first time to encourage students choose different learning routes according to their own abilities and time. The second is to introduce open source EDA tools, trying to let a small number of students with strong hands-on ability access and learn how to use back-end EDA tools, so as to open up the last link in the entire processor chip training chain. The third is to optimize the admission process and add defense ceremonies to allow students to always maintain a sense of awe for chips and to cultivate a sense of recognition and belonging to the open source community. The fourth is to add SIG, students with abilities and ideas can form teams to tackle projects of interest and jointly build and improve the open source chip software and hardware ecosystem. If you want to know more details, you can watch the video Launching meeting of the sixth session of the "One Student One Chip" Initiative [Zihao Yu]open in new window.

# Stages

# Knowledge Diagram

# Learning Route

As shown in the picture below, the learning route of the "One Student One Chip" Initiative is very clear, and each stage has corresponding tasks that need to be completed (the task completion time in the picture is for reference only). Students who currently sign up to participate in the "One Student One Chip" Initiative need to complete all tasks from "Fill a form" to "Debug Exam". Starting from the sixth session, we will invite some students to participate in the learning of the new processor back-end (That is "SoC Integration", "Physical Design", "PCB Testing", "Run Demos" in the picture) link on the basis of understanding and mastering the existing teaching content. It is hoped that in the future, every graduate of the "One Student One Chip" Initiative will become a composite innovative talent who is proficient in processor front-end design and has mastered processor back-end knowledge and usage.

# Expected Harvest

# Student Rights

No.Points tasks (part)
1Propose new cultural peripherals
2Participate in the "One Student One Chip" Survey Questionnaire
3"One Student One Chip" Official Acceptance Article
4"One Student One Chip" Official Acceptance and Sharing Video
5"One Student One Chip" Official Recruitment Report Video
6"One Student One Chip" Sharing Report
7Organize the "One Student One Chip" Lecture Tour
8Certification of Completion of Stage B Studies
9Certification of Completion of Stage A Studies
10Mission content is constantly being updated
No.Redeemable peripherals (some)
1"One Student One Chip" Cultural Shirt
2RISC-V Cultural Shirt
3"One Student One Chip" Canvas Bag
4"One Student One Chip" Backpack
5Shuttle tape-out area (customized)
6More peripherals will be launched soon, please stay tuned